Description

The Ira A. Fulton Schools of Engineering at Arizona State University (ASU) and the School for Engineering of Matter, Transport and Energy (SEMTE) seek applicants for a tenure-track or tenured faculty position in Materials, Mechanics, and Processing for Microelectronic Packaging. The search addresses the materials, processing, and mechanics that determine how packaged microelectronic systems are built and how they perform. We welcome candidates whose research is experimental, theoretical, or computational, and particularly encourage candidates who integrate these approaches. SEMTE (https://semte.engineering.asu.edu/), one of the eight Fulton Schools, houses a vibrant mechanical, aerospace, materials, and chemical engineering research community (learn more at https://research.engineering.asu.edu/). 

We seek applicants who can enhance our abilities in these areas as part of a community of experts. Particular areas of interest include, but are not limited to:

• Thermomechanical reliability of advanced packages: warpage, residual stress, and die and substrate coplanarity; interfacial fracture and delamination, including at hybrid-bonded and direct-bonded interfaces; solder and interconnect fatigue; electromigration; moisture and corrosion; drop and shock survivability; materials compatibility with direct liquid and immersion cooling; and accelerated test and lifetime prediction methods.
• Mechanics of materials for heterogeneous integration: constitutive behavior of solders, underfills, and mold compounds, including encapsulants with tailorable thermomechanical properties; cure-, bonding-, and process-induced stress; mechanics of temporary bonding, debonding, and carriers for wafer and panel handling; and deformation and failure at small length scales and across dissimilar-material interfaces.
• Materials, interfaces, and processing for advanced packaging: interconnect and bonding materials; hybrid and direct bonding, thermal compression bonding, and fan-out wafer- and panel-level processes; redistribution layers, plating chemistries, and low-loss dielectrics; glass-core and organic substrates, including through-glass vias; embedded components and package-integrated passives; buried-interface chemistry and microstructure; materials for sustainable manufacturing, including non-PFAS alternatives; and wafer- and panel-level process-structure-property relationships.
• Characterization, metrology, and failure analysis: electron microscopy; X-ray and synchrotron methods; full-field deformation measurement; non-destructive acoustic and X-ray imaging for buried interfaces and known-good-die screening; small-scale mechanical testing; and in-situ and operando techniques.
• Thermal transport and thermal management for high-power-density packages: embedded cooling architectures; thermal control for 3D stacks and co-packaged optics; die-to-die thermal resistance and cross-talk; thermal isolation and spreading; thermal interface materials; and thermal and thermomechanical property measurement.
• Modeling, simulation, and data-driven analysis: multiscale and multiphysics modeling; constitutive model development; prediction of process-induced stress and warpage; design-for-reliability; and AI/ML methods linking metrology and test data to yield and reliability outcomes.

We search for applicants who will contribute to our academic programs, promote transdisciplinary teaching and research, and help the university to achieve its aspirations, including enabling student success, transforming society, valuing entrepreneurship, and conducting use-inspired research. Faculty members in the Fulton Schools are expected to develop an internationally recognized and externally funded research program, adopt effective pedagogical practices in the development and delivery of undergraduate and graduate courses, advise both undergraduate and graduate student research and projects, and undertake service activities.

ASU sits at the center of one of the fastest-growing microelectronics ecosystems in the United States. The successful candidate will have access to extensive facilities for packaging research, including ASU’s MacroTechnology Works and its Advanced Electronics and Photonics Core Facility, the Eyring Materials Center, and the ASU NanoFab. These facilities support fan-out wafer-level and panel-level process development, including 300 mm wafer-level and 600 mm panel-level work carried out through SHIELD USA, a CHIPS National Advanced Packaging Manufacturing Program award led by ASU with Deca Technologies, and through the Southwest Advanced Prototyping Hub. The successful candidate will join a regional ecosystem that includes major semiconductor manufacturers, outsourced assembly and test providers, and national initiatives in microelectronics and advanced packaging. Faculty in this area are expected to engage with this ecosystem through industry collaboration and contributions to semiconductor workforce development.

Appointment will be at the Assistant/Associate/(full) Professor rank, commensurate with the candidate’s experience and accomplishments, beginning August 2027.  

Essential Functions

• Contribute to curriculum development.
• Deliver instruction in-person and/or online. 
• Supervise honors, master’s, and doctoral students.
• Conduct research publishable in top-tier journals and/or conferences in the discipline.
• Develop grant proposals for external funding as PI or co-PI.
• Participate in professional and internal service.

Required qualifications

• Earned doctorate in aerospace engineering, chemical engineering, materials science and engineering, mechanical engineering, or closely related discipline by the time of appointment.
• Evidence of excellence in research, as appropriate to the candidate’s rank.
• Evidence of excellence in teaching, as appropriate to the candidate’s rank.
• Demonstrated preparation and expertise to teach core undergraduate courses in one or more of the School’s instructional areas, such as mechanics or thermal sciences.

Desired qualifications  

• Demonstrated commitment to a collaborative, transdisciplinary approach to research and teaching.
• Expertise in chip-package-system co-design and verification, advanced characterization, mechanical testing, or failure analysis of microelectronic materials, interconnects, or packaged structures.
• Interest in developing or teaching graduate coursework in microelectronics packaging, reliability, or related areas.
• Experience in developing or sustaining research partnerships with industry or national laboratories.

Application Instructions
The application deadline is November 11, 2026. Applications will continue to be accepted on a rolling basis for a reserve pool. Applications in the reserve pool may then be reviewed in the order in which they were received until the position is filled. To apply, visit https://hiring.engineering.asu.edu/ and select “apply now” next to the corresponding position. Candidates will be asked to create or use an existing Interfolio Dossier to submit the following:

• Cover letter
• Curriculum Vitae
• Statement describing research interests (three pages maximum)
• Statement describing teaching interests and philosophy (two pages maximum)
• Contact information for three references

The ASU Charter states, “ASU is a comprehensive public research university, measured not by whom it excludes, but by whom it includes and how they succeed; advancing research and discovery of public value; and assuming fundamental responsibility for the economic, social, cultural and overall health of the communities it serves.” The Fulton Schools of Engineering is dedicated to cultivating excellence, delivering innovation that matters, encouraging bold thinking, fostering a community of learning and collaboration, and building a foundation for all to be successful. Applicants are encouraged to address how their past, current, and future activities align with the ASU Charter and Fulton Schools of Engineering values in their application materials. 

For additional information regarding position specifics, please contact the search committee chair, Jay Oswald via email at joswald1@asu.edu.

Equal Employment Opportunity Statement
A background check is required for employment. All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, national origin, disability, protected veteran status, or any other basis protected by law.

See https://www.asu.edu/aad/manuals/acd/acd401.html and https://www.asu.edu/titleIX/.

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